Design of multi-channels high-speed CMOS image acquisition system based on FPGA

doi:10.3778/j.issn.1002-8331.2008.21.012

Computer Engineering and Applications ›› 2008, Vol. 44 ›› Issue (21): 46-48.DOI: 10.3778/j.issn.1002-8331.2008.21.012

• 研发、设计、测试 • Previous Articles Next Articles

Design of multi-channels high-speed CMOS image acquisition system based on FPGA

SUN Chun-feng,YUAN Feng,DING Zhen-liang

Department of Automation Measurement and Control，Harbin Institute of Technology，Harbin 150001，China

Received:2008-01-28 Revised:2008-03-07 Online:2008-07-21 Published:2008-07-21
Contact: SUN Chun-feng

基于FPGA的多通道高速CMOS图像采集系统

孙春凤,袁峰,丁振良

哈尔滨工业大学自动化测试与控制系，哈尔滨 150001

通讯作者: 孙春凤

Abstract

Abstract: This paper researches a design project of CMOS image sensor data acquisition system based on FPGA chip.The system uses the module structure design，LVDS and ping-pang store technologies，and ensures the real-time performance of data acquisition and transmission.It introduces the operating principles and realization methods of image acquisition，data transition，sequential control and data deserializing modules.The experiment certificates the system realizes image acquisition，transmission and memory to 590 MPixels/s data size，and makes for the design and realization of the subsequent circuit greatly.

Key words: FPGA, image acquisition, data transition, sequential control

摘要： 基于图像采集系统高速、大容量的特点，提出了一种以FPGA芯片为核心处理器件的CMOS图像传感器数据采集系统的设计方案。系统将模块化结构设计、LVDS与乒乓存储等多项技术应用于设计过程中，保证了数据采集和传输的实时性。详细介绍了图像采集、数据传输、时序控制和数据解串等模块的工作原理及实现方法。实际应用证明，该系统实现了对数据量达590 MPixels/s的图像序列的数据采集、传输和存储，大大方便了后续图像处理电路的设计与实现。

关键词: FPGA, 图像采集, 数据传输, 时序控制

SUN Chun-feng,YUAN Feng,DING Zhen-liang. Design of multi-channels high-speed CMOS image acquisition system based on FPGA[J]. Computer Engineering and Applications, 2008, 44(21): 46-48.

孙春凤,袁峰,丁振良. 基于FPGA的多通道高速CMOS图像采集系统[J]. 计算机工程与应用, 2008, 44(21): 46-48.

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Design of multi-channels high-speed CMOS image acquisition system based on FPGA

基于FPGA的多通道高速CMOS图像采集系统

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