[1] |
DU Yuzhang, PAN Jiahua, ZONG Rong, SU Wei, WANG Weilian.
Lightweight Network Heart Sound Classifier Based on Hardware Acceleration
[J]. Computer Engineering and Applications, 2021, 57(23): 263-269.
|
[2] |
LENG Ming, SUN Lingyu, GUO Chen.
Forward Circuit Generation Algorithm of XDL Netlist
[J]. Computer Engineering and Applications, 2021, 57(10): 75-80.
|
[3] |
WU Yiyang, FAN Fan, ZHOU Yi, HUANG Jun.
FPGA Implementation of Affine Transformation Based on Pre-interpolation
[J]. Computer Engineering and Applications, 2020, 56(6): 224-230.
|
[4] |
ZHANG Haoyu, YING Jianfeng, SONG Chenyu, WANG Keke, YI Maoxiang.
Hardware Trojan Monitoring and Protection for Circuit Critical Path
[J]. Computer Engineering and Applications, 2020, 56(6): 73-78.
|
[5] |
WANG Meile, ZHANG Zhizhong, XI Bing.
Feasibility Analysis of Downlink Baseband Board for LTE-A Air Interface Analyzer
[J]. Computer Engineering and Applications, 2020, 56(4): 268-273.
|
[6] |
CHEN Xin, GAO Liangjun, REN Chuanbao, YI Maoxiang, HUANG Zhengfeng.
Hardware Trojan Detection Based on Transition Probability and RO Structure
[J]. Computer Engineering and Applications, 2020, 56(3): 49-54.
|
[7] |
ZHANG Wei, LIU Yuhong, ZHANG Rongfen.
Design of IP Cores for CNN Convolutional Layer and Pooling Layer Capable of Time Division Multiplexing
[J]. Computer Engineering and Applications, 2020, 56(24): 66-71.
|
[8] |
WU Jin, ZHANG Weihua, XI Meng, DAI Wei.
Optimized Design and FPGA Implementation of High-Performance Face Recognition Accelerator
[J]. Computer Engineering and Applications, 2020, 56(22): 48-54.
|
[9] |
WANG Fan, ZHOU Guoqing, ZHANG Rongting, LIU Dequan.
FPGA-Oriented Fast Connected Component Labeling Method
[J]. Computer Engineering and Applications, 2020, 56(22): 230-235.
|
[10] |
ZHANG Xinwei, LI Kang, YU Gongjian, LIU Jiahang, LI Peiqi, CHAI Zhilei.
Research and Implementation of Accelerating Neuromorphic Computing Based on ZYNQ Cluster
[J]. Computer Engineering and Applications, 2020, 56(21): 65-71.
|
[11] |
LI Zenggang, WANG Zhengyan, SUN Jingcheng.
Research and Design of Handwritten Digital BP Neural Network Based on FPGA
[J]. Computer Engineering and Applications, 2020, 56(17): 251-257.
|
[12] |
LI Rengang, REN Zhixin, WANG Jiangwei, KAN Hongwei, ZHANG Chuang, GONG Weifeng.
Design and Implementation of Memory Data Protection Technology Based on FPGA
[J]. Computer Engineering and Applications, 2020, 56(13): 72-76.
|
[13] |
SUN Jingcheng, WANG Zhengyan, LI Zenggang.
FPGA Implementation of Convolution Neural Network Digital Recognition System
[J]. Computer Engineering and Applications, 2020, 56(13): 181-188.
|
[14] |
LI Chiyang, LEI Qianqian, YANG Yanfei.
FPGA Implementation of Full-Universal AES Encryption Algorithm
[J]. Computer Engineering and Applications, 2020, 56(10): 83-87.
|
[15] |
LI Xiongwei1, WEI Yanhai1, WANG Xiaohan1, XU Lu2, SUN Ping3.
Improved Incremental SVDD Learning Algorithm for Hardware Trojan Detection
[J]. Computer Engineering and Applications, 2019, 55(9): 43-48.
|