Abstract: Hardware acceleration of specific numerical algorithms is one of the current trends in computing architecture.Jacobi method is the typical iterative method in numerical algorithms.To overcome the disadvantage of inefficient and bad real time capability in software version，a Jacobi solver is designed and implemented on FPGA platform.The design uses highly parallel，pipelined data path circuit design and optimization of the reduction circuit，?which can take full advantage of?the inherent?parallel and?the concurrent structure of FPGA.Final results illustrate that Jacobi iterative solver on FPGA hardware has good scalability and high computing performance.

Key words: Field-Programmable Gate Array（FPGA）, linear equations, Jacobi iterative, reduction circuit

摘要： 针对特定的数值算法进行硬件加速是当前体系结构的趋势之一。Jacobi迭代是典型的数值迭代算法，针对软件Jacobi迭代求解器性能慢，实时性差的缺点，在FPGA硬件平台上设计和实现了硬件Jacobi迭代求解器。求解器采用高度并行、流水的数据通路和优化的归约电路设计，充分利用了Jacobi迭代本身固有的并行性和FPGA的并发式结构，有效地提升求解器的性能。实验结果表明，Jacobi求解器具有良好的可扩展性和较高的计算性能。

关键词: 现场可编程门阵列（FPGA）, 线性方程组, Jacobi迭代, 归约电路