Abstract:

For the traditional BMC（Biphase Mark Coding） decoding in USB PD3.0（Universal Serial Bus Power Delivery） protocol, it has the disadvantages of high power consumption, large area, and poor interference resistance. A new decoding system with low power consumption, small area and strong robustness with automatic correction function is proposed. This system makes full use of the advantages of FIR（Finite Impulse Response） filtering algorithm and moving average filtering algorithm to make it better serve the decoding system. In addition, the system also adds a signal monitoring function. In order to verify the reliability of the system, the system is described in Verilog language under the DC development platform of Synopsys companies and verified by simulation. Experimental results show that under the same conditions, the system is significantly more robust than traditional decoding circuits, with an area reduction of 2.19% and a power consumption reduction of 2.06%, which fully reflects the low power consumption, small area, and strong anti-interference ability, etc.. This system lays a theoretical foundation for improving the reliability and practicability of USB PD fast charging chip design, and improves the charging efficiency of USB PD3.0.

Key words: USB PD3.0 protocol, Biphase Mark Coding（BMC）, correction circuit, Finite Impulse Response（FIR） filtering algorithm, power consumption

摘要：

针对USB PD3.0（Universal Serial Bus Power Delivery）协议中的传统BMC（Biphase Mark Coding）解码所存在的功耗高、面积大、抗干扰性差等缺点，提出了具有自动校正功能的低功耗、面积小、鲁棒性强的新型解码系统。该系统充分利用了FIR（Finite Impulse Response）滤波算法和滑动平均滤波算法的优点，使之更好地服务于该解码系统，此外，该系统还增加了信号监控功能。为验证该系统的可靠性，在Synopsys公司的DC开发平台下，采用Verilog语言描述该系统电路并进行仿真验证。实验结果表明，在同等情况下，该系统与传统解码电路相比，鲁棒性明显增强，同时面积降低了2.19%，功耗降低了2.06%，充分体现低功耗、面积小、抗干扰能力强等优点。该系统为提高USB PD快速充电芯片设计的可靠性、实用性奠定了理论基础，并且提高了USB PD3.0的充电效率。

关键词: USB PD3.0协议, BMC解码, 校正电路, FIR滤波算法, 功耗