[1] |
WANG Meile, ZHANG Zhizhong, XI Bing.
Feasibility Analysis of Downlink Baseband Board for LTE-A Air Interface Analyzer
[J]. Computer Engineering and Applications, 2020, 56(4): 268-273.
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[2] |
LI Chiyang, LEI Qianqian, YANG Yanfei.
FPGA Implementation of Full-Universal AES Encryption Algorithm
[J]. Computer Engineering and Applications, 2020, 56(10): 83-87.
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[3] |
PENG Fulai, YU Zhilou, CHEN Naikuo, GENG Shihua, LI Kaiyi.
Reconfigurable computing system design and performance exploration towards to domestic CPU
[J]. Computer Engineering and Applications, 2018, 54(23): 36-41.
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[4] |
WANG Weiting1,2, LI Jinjie2, ZHANG Wenxu1.
Research of implementing DDS without phase truncation spur based on phase code compensation
[J]. Computer Engineering and Applications, 2017, 53(4): 244-250.
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[5] |
WANG Kai,SHI Longzhao.
Design and implementation of fast connected component labeling algorithm based on FPGA
[J]. Computer Engineering and Applications, 2016, 52(18): 192-198.
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[6] |
XIE Zhoubiao1, ZHOU Yi2, LONG Bin3.
Research on ellipse hardware accelerating algorithm and its FPGA implementation
[J]. Computer Engineering and Applications, 2015, 51(3): 45-49.
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[7] |
ZHANG Li1, ZHOU Fan1, HU Yinfeng2.
Real-time image data transposition method for high-speed digital inkjet printer
[J]. Computer Engineering and Applications, 2014, 50(6): 35-39.
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[8] |
MA Shengqian, YANG Yang, LIU Juanfang.
Adaptive low pass filter circuit implemented by ADPLL
[J]. Computer Engineering and Applications, 2014, 50(3): 181-184.
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[9] |
YANG Jianfeng, ZHANG Feng, ZHANG Cui.
Strategy of speed-controlled signal of multi-channel PWM based on ROM of FPGA
[J]. Computer Engineering and Applications, 2014, 50(20): 244-248.
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[10] |
WANG Zhibin, YANG Wenmin, ZHANG Yuanpu, CHAI Zhilei.
Dense optical flow software-hardware co-processing based on ZYNQ
[J]. Computer Engineering and Applications, 2014, 50(18): 44-49.
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[11] |
LI Zhican1, WANG Yi1,2,3, LI Renfa1,2,3.
Research of reconfigurable Gr?stl algorithm on FPGA platform
[J]. Computer Engineering and Applications, 2012, 48(6): 49-52.
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[12] |
ZHU Xueliang, CHAI Zhilei, LIANG Jiuzhen, ZHONG Chuanjie.
Study and implementation of FPGA-based KLT algorithm for fabric inspection system
[J]. Computer Engineering and Applications, 2012, 48(24): 144-148.
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[13] |
XIANG Liangjun1, WANG Zibin1, JIN Guoping2, ZHENG Linhua1.
Design and FPGA implementation for high-speed RS coding and decoding
[J]. Computer Engineering and Applications, 2012, 48(1): 64-67.
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[14] |
CHEN Xiaoming, LI Binhua.
VHDL design of EMCCD timing generator
[J]. Computer Engineering and Applications, 2012, 48(1): 72-75.
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[15] |
SONG Qingzeng1,GU Junhua2,ZHANG Jinzhu3.
Research on FPGA-based Jacobi iterative solver
[J]. Computer Engineering and Applications, 2011, 47(29): 74-77.
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