Computer Engineering and Applications ›› 2020, Vol. 56 ›› Issue (17): 251-257.DOI: 10.3778/j.issn.1002-8331.1906-0118

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Research and Design of Handwritten Digital BP Neural Network Based on FPGA

LI Zenggang, WANG Zhengyan, SUN Jingcheng   

  1. College of Electronic Information, Qingdao University, Qingdao, Shandong 266071, China
  • Online:2020-09-01 Published:2020-08-31

基于FPGA的手写数字BP神经网络研究与设计

李增刚,王正彦,孙敬成   

  1. 青岛大学 电子信息学院,山东 青岛 266071

Abstract:

The handwritten digital BP(Back Propagation) neural network consists of an input layer, a hidden layer, and an output layer. It’s training data is 60,000 samples in the MNIST data set, the BP algorithm consists of a stochastic gradient descent algorithm and back propagation algorithm. The network learning process uses 30 small iterations of small batch data to train appropriate network weights and offsets. It is important to design BP algorithm, timing control layer network state, Sigmoid (S-type) function and its derivative linear fitting in Verilog language by using FPGA(Field Programmable Gate Array) hardware platform. The network weight and offset of Gaussian distribution are initialized with a mean of 0 and a variance of 1, and the input samples and labels of the system are simulated and analyzed in Quartus 13.0 and modelsim. In system, small batch data [m] is 10, the learning coefficient [η] is 3, running iteration 30 times is 4.5?s, and recognition correct rate is 91.6%, which satisfies the real-time requirement and has high accuracy.

Key words: Field Programmable Gate Array(FPGA), Back Propagation(BP) neural network, handwritten digit, Back Propagation(BP) algorithm, Verilog language

摘要:

手写数字逆向传播(Back Propagation,BP)神经网络由输入层、隐藏层、输出层构成。训练数据是MNIST开源手写数字集里60?000个样本,BP算法由随机梯度下降算法和反向传播算法构成,采用network小批量数据迭代30次的网络学习过程,训练出合适的权重和偏置。利用现场可编程门阵列(Field Programmable Gate Array,FPGA)硬件平台,Verilog代码实现BP算法、时序控制各层网络训练状态、Sigmoid(S型)函数及导数线性拟合是设计重点。初始化均值为0,方差为1的高斯分布网络权重和偏置,采用小批量数据个数[m]为10,学习系数[η]为3,在系统中输入样本及标签利用Quartus13.0和modelsim仿真与分析,工程运行迭代30次时间是4.5 s,样本识别正确率是91.6%,与软件python2.7相比满足了硬件设计的实时性和手写数字识别的高准确率。

关键词: 现场可编程门阵列(FPGA), 逆向传播(BP)神经网络, 手写数字, 逆向传播(BP)算法, Verilog语言