Abstract: An optimized Radix-4 FFT algorithm is proposed firstly.Based on this algorithm，a pipelined 64-point IFFT/FFT processor，which can obtain 64-point output during 64 clock cycles only by three complex multipliers so as to improve its operation speed and save its hardware resources，is designed.The verification is carried out through the downloaded Xilinx XC2S300E Spartan2E series xc2s300e device，whose result is less than 0.5% difference compared with the result from the MATLAB calculation.The processor has been successfully used to an OFDM communication system.

摘要： 提出了Radix-4 FFT的优化算法，采用该优化算法设计了64点流水线IFFT/FFT处理器，该处理器可以在64个时钟周期内仅采用3个复数乘法器获得64点处理结果，提高了运算速度，节约了硬件资源。通过Xilinx XC2S300E Spartan2E系列的xc2s300e器件进行下载验证，仿真结果与MATLAB计算结果误差小于0.5%，该处理器已经成功应用于某OFDM通信系统中。