[1] |
XU Jiajun, ZHANG Yiwei, ZHAO Jian, XIANG Shaohua.
Power Template-Collision Analysis Based on SM4 Algorithm
[J]. Computer Engineering and Applications, 2021, 57(11): 111-118.
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[2] |
LENG Ming, SUN Lingyu, GUO Chen.
Forward Circuit Generation Algorithm of XDL Netlist
[J]. Computer Engineering and Applications, 2021, 57(10): 75-80.
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[3] |
WU Yiyang, FAN Fan, ZHOU Yi, HUANG Jun.
FPGA Implementation of Affine Transformation Based on Pre-interpolation
[J]. Computer Engineering and Applications, 2020, 56(6): 224-230.
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[4] |
ZHANG Wei, LIU Yuhong, ZHANG Rongfen.
Design of IP Cores for CNN Convolutional Layer and Pooling Layer Capable of Time Division Multiplexing
[J]. Computer Engineering and Applications, 2020, 56(24): 66-71.
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[5] |
WU Jin, ZHANG Weihua, XI Meng, DAI Wei.
Optimized Design and FPGA Implementation of High-Performance Face Recognition Accelerator
[J]. Computer Engineering and Applications, 2020, 56(22): 48-54.
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[6] |
WANG Fan, ZHOU Guoqing, ZHANG Rongting, LIU Dequan.
FPGA-Oriented Fast Connected Component Labeling Method
[J]. Computer Engineering and Applications, 2020, 56(22): 230-235.
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[7] |
LIU Jianfeng, LI Ruihua, LIU Yaoqi, SU Yongtao, HU Jinlong.
Research on Signal-to-Noise Ratio Estimation Algorithm in Wireless Communication
[J]. Computer Engineering and Applications, 2020, 56(18): 82-89.
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[8] |
LI Zenggang, WANG Zhengyan, SUN Jingcheng.
Research and Design of Handwritten Digital BP Neural Network Based on FPGA
[J]. Computer Engineering and Applications, 2020, 56(17): 251-257.
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[9] |
LI Rengang, REN Zhixin, WANG Jiangwei, KAN Hongwei, ZHANG Chuang, GONG Weifeng.
Design and Implementation of Memory Data Protection Technology Based on FPGA
[J]. Computer Engineering and Applications, 2020, 56(13): 72-76.
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[10] |
SUN Jingcheng, WANG Zhengyan, LI Zenggang.
FPGA Implementation of Convolution Neural Network Digital Recognition System
[J]. Computer Engineering and Applications, 2020, 56(13): 181-188.
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[11] |
CHEN Lin, ZHONG Weidong, YANG Xiaoyuan, LIU Wenchao.
Mixed Intelligent Side Channel Analysis Attack Method for SM4
[J]. Computer Engineering and Applications, 2019, 55(23): 86-91.
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[12] |
WANG Haiyu, XIE Lili, WANG Shan.
Neural Network Sinusoidal Signal Generator
[J]. Computer Engineering and Applications, 2019, 55(16): 259-264.
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[13] |
LI Xinchao1,2, ZHONG Weidong1,2, ZHANG Shuaiwei1,2, MA Shuangpeng1,2.
New S-box of SM4 based on threshold implementation
[J]. Computer Engineering and Applications, 2018, 54(17): 83-88.
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[14] |
LI Xuesong1,2, PENG Changgen1,2,3,4, ZHANG Hong1,2.
SMAE:new authenticated encryption algorithm
[J]. Computer Engineering and Applications, 2018, 54(14): 107-114.
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[15] |
WANG Weiting1,2, LI Jinjie2, ZHANG Wenxu1.
Research of implementing DDS without phase truncation spur based on phase code compensation
[J]. Computer Engineering and Applications, 2017, 53(4): 244-250.
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