Abstract: High-quality algorithms for dense optical flow computation are computationally expensive, which limits their usability in real-world applications. In order to solve this problem, the hardware accelerator is applied for a high-quality dense optical flow algorithm by CBG（Combined-Brightness-Gradient） model, based on fine-grained parallelisms of FPGAs（Field Programmable Gate Arrays）. Experimental results show that 40 frame/s can be processed in time when the working frequency is 200 MHz and the image size is 316×252. Furthermore, optical flow fields for all pixels instead of selected areas are computed for designing.

Key words: optical flow computation, successive over relaxation method, Field Programmable Gate Arrays（FPGA）, parallel computing, real-time performance

摘要： 高质量的稠密光流算法计算复杂度很高，因此计算速度成为制约其在实际系统中应用的重要原因。针对这一问题，利用现场可编程门阵列（FPGA）的细粒度并行特性，实现了一种高质量的稠密光流算法CBG（Combined- Brightness-Gradient）的硬件加速器。实验结果表明，在FPGA工作频率200 MHz，计算全部像素对应的光流信息的情况下，该系统处理分辨率为316×252的图像序列的帧频可达40 frame/s。

关键词: 光流计算, 超松弛法, 现场可编辑门阵列, 并行计算, 实时性