Computer Engineering and Applications ›› 2016, Vol. 52 ›› Issue (12): 1-4.

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Hardware implementation of two-level scheduling algorithm of μC/OS-II

LI Yan, CUI Haoxin, DU Yongbin   

  1. School of Computer Science and Technology, Harbin University of Science and Technology, Harbin 150080, China
  • Online:2016-06-15 Published:2016-06-14

μC/OS-II二级调度算法的硬件实现

李  岩,崔浩鑫,杜永斌   

  1. 哈尔滨理工大学 计算机科学与技术学院,哈尔滨 150080

Abstract: Aiming at the problem that μC/OS-II does not support round-robin scheduling of the same priority task, a two-
level hybrid task scheduling strategy is proposed. In the first level, by putting the task priority as criterion for task scheduling, a preemptive scheduling of different priority task is implemented. And in the second level, adopting time slice circular scheduling strategy, round-robin scheduling of same priority task is implemented. The waiting list of tasks is designed by on-chip registers of FPGA and the ready list of tasks is designed by RAM of FPGA, and to implement time slice circular scheduling, hardware circuit for finding successor of task is designed. The system adopts VHDL, and is simulated by the software ISE10.1. The simulation results show that the hardware implementation of the system is well-worked.

Key words: real-time operating system, time slice circular scheduling, hardware task scheduler, Field Programmable Gate Array(FPGA)

摘要: 针对μC/OS-II不支持同优先级任务轮转调度的问题,提出了二级混合任务调度策略。第一级调度把任务优先级高低作为任务调度的标准,实现不同优先级任务的抢占式调度;第二级采用时间片轮转策略,实现同优先级任务的轮转调度。采用FPGA片内的寄存器和RAM实现了等待任务列表和就绪表,并设计了后继轮转任务查找电路实现时间片轮转调度。整个设计采用VHDL,通过ISE 10.1软件时序仿真验证。仿真结果证明,硬件实现行之有效。

关键词: 实时操作系统, 时间片轮转调度, 硬件任务调度器, 现场可编程门阵列