Computer Engineering and Applications ›› 2015, Vol. 51 ›› Issue (19): 158-163.

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High-performance dark channel prior algorithm design of FPGA

JIANG Shouhuan, WANG Ronggui, WANG Jing, ZHANG Dongmei, LI Xiang   

  1. School of Computer and Information, Hefei University of Technology, Hefei 230009, China
  • Online:2015-09-30 Published:2015-10-13

FPGA的高性能暗原色先验算法设计

蒋守欢,汪荣贵,王  晶,张冬梅,李  想   

  1. 合肥工业大学 计算机与信息学院,合肥 230009

Abstract: Based on dark channel prior algorithm to improve guide filter, a fast method of calculating the mean pixel template is proposed, and the circuit structure of the improved method is designed. The mean template is achieved by means of storing the sum of the first and the last column of local window, and then plus/minus the corresponding column in the value of a pixel. Under the premise of unchanging the filter effect, this calculation method can effectively reduce the computational complexity to constant level and more fit the parallel flow design of FPGA. Experimental results show that the series EP2C70 FPGA development board of Altera Corporation CycloneII, its usage of logic and memory is 7.9% and 35% respectively, the low-end FPGA can satisfy the demands, 100 frames [1 024×1 024] images can be handled in every second, and real-time fully meet the requirements.

Key words: dark channel prior, guided filter, Field Programmable Gate Arrays(FPGA)

摘要: 对暗原色先验算法中引导滤波器进行改进,提出了一种快速计算像素模板均值的方法,并设计了这种改进方法的电路结构。模板均值是通过存储局部窗口第一列和最后一列的和,加上/减去其相应列中某个像素点的值得到,这种计算方法不仅能够在不改变滤波效果的前提下使计算复杂度降低到常数级,而且更符合FPGA的并行流水设计。实验结果表明,在Altera公司CycloneII系列的EP2C70的FPGA开发板上的逻辑和内存的使用量分别占7.9%和35%,低端FPGA能够满足需求,每秒可处理100帧[1 024×1 024]的图像,实时性完全达到要求。

关键词: 暗原色先验, 引导滤波器, 现场可编程门阵列