Computer Engineering and Applications ›› 2012, Vol. 48 ›› Issue (6): 65-68.

• 研发、设计、测试 • Previous Articles     Next Articles

Implementation of digital image DCT based on FPGA

LIU Fangming1, PAN Xiaozhong1,2, YANG Xiaoyuan1,2,3, SU Guangwei1   

  1. 1.Key Laboratory of Network and Information Security, the Chinese Armed Police Force, Department of Electronic Technology, Engineering University of the Armed Police Force, Xi’an 710086, China
    2.Institution of Network and Information Security, Engineering University of the Armed Police Force, Xi’an, 710086, China
    3.Key Laboratory of Network and Information Security, Ministry of Education, Xidian University, Xi’an 710071, China
  • Received:1900-01-01 Revised:1900-01-01 Online:2012-02-21 Published:2012-02-21

数字图像DCT变换的FPGA实现

刘方明1,潘晓中1,2,杨晓元1,2,3,苏光伟1   

  1. 1.武警工程大学 电子技术系 网络与信息安全武警部队重点实验室,西安 710086
    2.武警工程大学 网络与信息安全研究所,西安 710086
    3.西安电子科技大学 网络信息安全教育部重点实验室,西安 710071

Abstract: This paper implements Discrete Cosine Transform(DCT) of image based on Field Programmable Gate Array(FPGA), in order to resolve the problem that software method cannot meet the demand of real-time, due to its large computation. Its design adopts row-column composition structure of 2D-DCT, and introducs double RAM structure between two 1D-DCT, whose computational parallelity can be guaranteed by Ping-Pong operation, and computational efficiency also can be improved. The whole module is modeled by Verilog HDL, its logic functions is verified by ModelSim. The design is successfully compiled on Quartus II and finally realized on Altera EP2C70F896C6 chip after structure optimization. The results show this design has exact functions and thus it can be used as an independent unit integrated into real-time system processing image.

Key words: two Dimension Discrete Cosine Transform(2D-DCT), Field Programmable Gate Array(FPGA), hardware structure, Ping-Pong operation

摘要: 图像DCT变换由于计算量大,软件实现往往难以满足实时处理的要求,基于FPGA在硬件上实现了图像的DCT变换。设计采用了2D-DCT的行列分解结构,在两级1D-DCT之间引入双RAM结构,通过乒乓操作保证了前后级DCT运算的并行性,提高了运算速度。整个模块使用Verilog HDL建模,通过ModelSim编写激励对逻辑功能进行了验证,最后在Quartus II上通过了综合编译,设计优化后下载到Altera EP2C70F896C6芯片上进行实现。结果显示,该模块功能结构正确,可作为一个独立单元集成在图像的实时处理系统中。

关键词: 二维离散余弦变换(DCT), 现场可编程门阵列(FPGA), 硬件结构, 乒乓操作