Computer Engineering and Applications ›› 2011, Vol. 47 ›› Issue (27): 60-64.

• 研发、设计、测试 • Previous Articles     Next Articles

Accelerating sparse-grid based SSTA using Graphics Processing Uni

YE Xiaomin,ZHOU Xuegong,CAO Wei,WANG Lingli   

  1. State Key Laboratory of ASIC & System,Fudan University,Shanghai 201203,China
  • Received:1900-01-01 Revised:1900-01-01 Online:2011-09-21 Published:2011-09-21

利用GPU加速基于稀疏网格的SSTA

叶晓敏,周学功,曹 伟,王伶俐   

  1. 复旦大学 专用集成电路与系统国家重点实验室,上海 201203

Abstract: A novel approach to accelerate Statistical Static Timing Analysis(SSTA) using graphics processing unit is presented.Sparse grid is used to reduce the configuration number of each node in the timing graph.Configurations are calculated parallel on GPU after timing graph has been built on GPU.Experimental results show that by implementing S-G based SSTA on GPU,it can attain an average speedup of about 300 times without loss of accuracy.With the increasing scale of the circuits and the development of VLSI process,the proposed approach to accelerate SSTA decreases the runtime of timing analysis to improve the efficiency.

Key words: Graphics Processing Unit(GPU), sparse grid, Statistical Static Timing Analysis(SSTA)

摘要: 提出一种利用图形处理单元(Graphics Processing Unit,GPU)加速统计静态时序分析的方法,利用稀疏网格减少统计静态时序分析中时序图各节点的配置个数,在GPU上构建复杂的时序图数据结构后并行计算各节点的不同配置,达到加速统计静态时序分析的目的。测试结果表明,提出的方法能够在不损失精度的前提下,将统计静态时序分析运行速度平均提高300倍以上。随着现代集成电路规模的持续增大和集成电路工艺的不断发展,这种新型快速的统计静态时序方法能够有效提高时序分析的速度和效率。

关键词: 图形处理单元, 稀疏网格, 统计静态时序分析