Abstract: Bit-Plane Coding（BPC） is an important part of EBCOT which belongs to JPEG2000 coder.In order to improve the efficiency of BPC，this paper presents an improved parallel hardware architecture used to realize word-level bit-plane coding，and studies the parallel processing technology of pass prediction and context formation.It can be finished that all bits of one stripe are coded in parallel during one clock cycle.When sample coefficients are coded one after another，there code passes included in each bit-plane are scanned in one time.This architecture is realized by ModelSim and synthesized by TSMC.Experimental result demonstrates that the proposed architecture can provide high-speed data processing and efficient hardware cost reducing.It is fit for real-time image and video application.

Key words: JPEG2000, bit-plane coding, word-level sequential, coding pass prediction, single window

摘要： 位平面编码（BPC）是JPEG2000编码器中EBCOT的重要组成部分。为了解决BPC实现的低效问题，提出了一种改进的并行硬件结构来实现字级位平面编码算法。对编码通道预测和上下文形成的流水线并行处理技术进行了研究，实现了在一个时钟周期内对一个条带列的所有位样本并行编码。当样本系数被顺次编码时，包含在每个位平面中的三个通道编码在一次扫描中完成。该系统结构已经通过ModelSim实现和TSMC综合。结果表明，该结构可以有效减少硬件成本，并提供高速的数据处理能力，适合实时图像和视频的应用。

关键词: JPEG2000, 位平面编码, 字级顺序, 编码通道预测, 单窗口