Abstract: The paper realizes the design of SDXC matrix with Verilog HDL based on a improved unit architecture. The SDXC matrix can implement non-blocking cross-connect of any grade STM-1 input signal. This paper emphasizes the principle and implementation of its real-time, adaptive function. At the end of the article, we can see the SDXC system simulation figures.

摘要： 本文通过改进传统数字交叉连接矩阵的单元结构，详细介绍了基于Verilog语言的SDXC矩阵设计的一种新方法。此矩阵可实现2条STM-1输入信号中任意等级支路之间的无阻塞时隙交换。文章着重阐述了交叉连接矩阵实时、自适应交换功能的原理及实现方法，并给出了系统的功能仿真波形图。