A Design and Implementation of Versatile and Reconfigurable Multiplier over GF(2m)

Computer Engineering and Applications ›› 2007, Vol. 43 ›› Issue (12): 91-93.

• 产品、研发、测试 • Previous Articles Next Articles

A Design and Implementation of Versatile and Reconfigurable Multiplier over GF(2m)

Received:2006-05-08 Revised:1900-01-01 Online:2007-04-20 Published:2007-04-20

GF(2^m)域上通用可配置乘法器的设计与实现

卫学陶戴紫彬陈韬

解放军信息工程大学电子技术学院301教研室解放军信息工程大学电子技术学院信息工程大学电子技术学院

通讯作者: 卫学陶

Abstract

Abstract: Abstract: A finite field multiplier architecture is proposed in this paper for ECC. Based on previous digit-serial multiplier architecture, we used bit-parallel architecture of local parallel to eliminate reduction modulo circuit effectively, and the multiplier architecture also be the same with arbitrary irreducible polynomials. We controlled data format of import by data interface and embedded multiplier of most size, that can configure architecture of finite field multiplier to carry out multiplication operation base on polynomial base. A multiplier is proposed in this paper able to satisfy different security demand of ECC.

Key words: Galois field, GF(2m) , multiplier

摘要： 摘要：本文提出了一种应用于椭圆曲线密码体制中的有限域乘法器结构，基于已有的digit-serial结构乘法器，利用局部并行的bit-parallel结构，有效的省去了模约简电路，使得乘法器适用于任意不可约多项式；通过使用数据接口控制输入数据的格式并内嵌大尺寸乘法器，可以配置有限域乘法器的结构，用以实现基于多项式基的有限域乘法运算。该结构可以有效满足椭圆曲线密码体制的不同安全需求。

关键词: 有限域, GF(2m) , 乘法器

卫学陶戴紫彬陈韬. GF(2^m)域上通用可配置乘法器的设计与实现[J]. 计算机工程与应用, 2007, 43(12): 91-93.

[1]	ZHANG Shanshan, ZHAO Jianhua. Through-the-Wall Radar Imaging Algorithm Based on Inexact Augmented Lagrange Multiplier [J]. Computer Engineering and Applications, 2021, 57(11): 77-83.
[2]	SHU Shike, LI Lu. Multi-factor Quantitative Stock Selection Strategy Based on Sparsity Penalty [J]. Computer Engineering and Applications, 2021, 57(1): 110-117.
[3]	WU Gang1，2, ZENG Xiaoqin2, WANG Chishe1, SU Shoubao1. Correlation Filter Tracking Integrated DCNN Depth Feature with Alternating Direction of Multipliers [J]. Computer Engineering and Applications, 2019, 55(8): 157-163.
[4]	CAO Mengqi1，2, LI Demin1，2, ZHANG Guanglin1，2, GUO Chang1，2. Method of Solving Traffic Network Path with Shortest Time [J]. Computer Engineering and Applications, 2019, 55(4): 233-237.
[5]	SUI Lulu, HAN Dongsheng, YAN Fei, YAN Gaowei. Research and Application of Multi-Task Regularized Extreme Learning Machine [J]. Computer Engineering and Applications, 2019, 55(3): 120-125.
[6]	LIU Bingquan1, PAN Lijing1, DU Wei2. Efficient algorithm for logit stochastic traffic equilibrium problem with dual constraints [J]. Computer Engineering and Applications, 2018, 54(17): 221-224.
[7]	ZHU Lun1, YANG Bo2. Single-valued neutrosophic information entropy and its application to multi-attribute decision making method [J]. Computer Engineering and Applications, 2018, 54(15): 107-111.
[8]	HU Yonggang1, ZHANG Xiongwei1, ZOU Xia1, MIN Gang1，2, ZHANG Liwei1, WANG Jian3. Speech enhancement algorithm using ADMM sparse nonnegative matrix factorization [J]. Computer Engineering and Applications, 2016, 52(3): 108-112.
[9]	LI Lei1, REN Yuemei1，2. Image deblurring based on sparsity regularized and multi-variable splitting method [J]. Computer Engineering and Applications, 2016, 52(3): 150-153.
[10]	YANG Yan, JIN Zhengmeng, JIANG Xiaolian, LIU Yan, ZHANG Yongyan. Fast variational algorithm based on detail preserving for Poisson noise removal [J]. Computer Engineering and Applications, 2016, 52(20): 172-176.
[11]	HUO Jia, LIU Rong. Low-complexity GF multiplier design based on Karatsuaba algorithm [J]. Computer Engineering and Applications, 2015, 51(5): 38-43.
[12]	CUI Xiao. Subspace speech enhancement of Lagrange multipliers controlled [J]. Computer Engineering and Applications, 2014, 50(9): 182-185.
[13]	CHEN Rongsu. Algorithm study for multi-objective Vague decision making [J]. Computer Engineering and Applications, 2014, 50(18): 67-69.
[14]	LIU Bin1, LI Zhijun1, ZENG Yicheng2, YANG Jun1, ZHANG Jiao1. FPAA based on digitally controlled linearly tunable OTA [J]. Computer Engineering and Applications, 2013, 49(19): 49-53.
[15]	ZHANG Dan1，2, LIU Xinhua1，2, ZHANG Jialiang1，2. Design of lock-in amplifier circuit and developed for weak signal detection [J]. Computer Engineering and Applications, 2013, 49(15): 210-214.

A Design and Implementation of Versatile and Reconfigurable Multiplier over GF(2m)

GF(2^m)域上通用可配置乘法器的设计与实现

Knowledge

Abstract

Cite this article

share this article

References

Related Articles 15

Recommended Articles

Metrics

A Design and Implementation of Versatile and Reconfigurable Multiplier over GF(2m)

GF(2m)域上通用可配置乘法器的设计与实现

Knowledge

Abstract

Cite this article

share this article

References

Related Articles 15

Recommended Articles

Metrics

GF(2^m)域上通用可配置乘法器的设计与实现