Computer Engineering and Applications ›› 2006, Vol. 42 ›› Issue (27): 1-.

• 博士论坛 •     Next Articles

The Research and Implementation on Cyclical Redundancy Check Arithmetic based on Parallel Data input

Zhenyu Yin,,,,   

  1. 东北大学 信息科学与工程学院
  • Received:2006-07-21 Revised:1900-01-01 Online:2006-09-21 Published:2006-09-21
  • Contact: Zhenyu Yin

一种并行数据输入的循环冗余校验码算法设计

尹震宇、赵海、孙佩刚、林恺、罗玎玎

  

  1. 东北大学 信息科学与工程学院
  • 通讯作者: 尹震宇 yinzhenyu

Abstract: In this paper, the principle of cyclical redundancy check (CRC) is described. Furthermore, the CRC arithmetic with the parallel data input structure is described. It can be easily implemented by using VLSI. Also, in this paper, a CRC-6 module is designed and implemented by using VHDL as the example. The CRC module which is designed using this method has high performance.

Key words: Cyclical redundancy check, Polynomial arithmetic, Liner coder, Data error check

摘要: 本文介绍了CRC的数学原理。继而讨论了一种利于硬件实现的并行数据输入CRC算法的推导方法及其实现方法。最后,采用本文中提出的设计算法,使用VHDL设计并实现了CRC-6运算模块,与其它算法实现的CRC模块相比,在使用的资源增加不大的情况下,可以获得较高的性能。

关键词: 循环冗余码校验, 多项式运算, 线性编码, 数据校验