Abstract: The multiply-add operation is becoming important increasingly with the development of application specific microprocessor oriented to DSP and some other interrelated fields. The computation of a multiplication and the summation of the result with another operand can be performed concurrently reducing, in this way, the latency of the overall operation. Based on the idea of multi-path, this thesis proposes an improved multi-path floating-point fused multiply-add (MAF). The process is divided into four data paths according to the relative position of operand A from the result of B×C. Each path uses the separate operation process so that the unwanted delay is avoided. By contrast, we can conclude that the multi-path MAF architecture has advantages in both the speed and the power.

Key words: loating-point fused multiply-add, multi-path, low power

摘要： 随着面向数字信号处理以及其他相关领域的专用微处理技术的发展，浮点乘加运算变得日益重要。该操作将乘法和加法相融合，节省了整个运算的执行延时。基于多通路的思想，本文提出一种改进的多通道浮点乘加器结构。根据对阶时A相对于B×C乘积的位置，将整个处理过程分为四条数据通路，采用不同的数据处理通路，避免了不必要的处理延时。通过对比得出：多通道浮点乘加器无论在速度以及功耗上，都具有一定的优势。

关键词: 浮点乘加器, 多通道, 低功耗