Abstract: DRC is a basic method of image enhancement which is applied in image recognition，video surveillance and so on.According to the applications，a DRC algorithm of image based on nonlinear transform is proposed.Aiming at the processing of an image，this algorithm based on FPGA is implemented，and the whole framework and arithmetic logic of the DRC system are given.Attention is paid to the issue of how to optimize FPGA’s area and speed，and a pipeline control logic is proposed.Verilog HDL is used to describe the design，and then Ncverilog is used to assemble and simulate the code based on Linux.The simulation and implementation of this system are performed by Xilinx’s FPGA design tool Synplify Pro 8.2.1.The results show the validity and feasibility of this design.

摘要： 灰度动态范围压缩是一种基本的图像增强处理方法，广泛应用于图像识别，视频监控等领域中。结合这一应用，提出了一种基于非线性变换的动态范围压缩算法，并且以FPGA为基础，针对一幅图像的处理进行硬件实现，给出了硬件整体构架以及算法逻辑，并针对FPGA速度与面积优化的问题，完成了控制逻辑的流水线设计。最后采用Verilog HDL对设计进行了描述，利用Ncverilog对模块进行了仿真，给出了基于Synplify Pro 8.2.1的实现方案。结果表明，该设计较好地实现了图像动态范围压缩，其硬件实现构架是行之有效的。