Computer Engineering and Applications ›› 2010, Vol. 46 ›› Issue (6): 63-66.DOI: 10.3778/j.issn.1002-8331.2010.06.018

• 研发、设计、测试 • Previous Articles     Next Articles

Fast implementation of cycle-level processor simulator

YANG Wei,CHEN Ming-yu,XU Jian-wei   

  1. Institute of Technology Computer,Chinese Academy of Sciences,Beijing 100190,China
  • Received:2009-06-08 Revised:2009-08-11 Online:2010-02-21 Published:2010-02-21
  • Contact: YANG Wei

一种时钟级处理器模拟器的快速开发方法

杨 伟,陈明宇,许建卫   

  1. 中国科学院 计算技术研究所,北京 100190
  • 通讯作者: 杨 伟

Abstract: A fast implementation of cycle-level processor simulator is introduced,which is based on function-level processor simulator,with timing-directed method involved.This method uses an instruction pipeline to drive function module of processor simulator work,such as ALU,Co-processor,MMU,and TLB.This paper presents the design of a classic pipeline of RISC/MIPS instruction set,and how to integrate the pipeline and function module of processor simulator,to generate a cycle-level processor simulator framework.The tests of SPEC CPU 2000 prove that,this cycle-level processor simulator has high accurate and performance.

Key words: function-level, cycle-level, timing-direct, processor simulator

摘要: 基于功能级处理器模拟器,采用时序制导的方法,提出了一种时钟级处理器模拟器的快速开发方法。该方法对指令的模拟引入流水线,依靠流水线的时序推动功能模块的运行,如ALU、Co-processor、MMU、TLB等。给出了RISC/MIPS流水线的设计方法,并进一步阐述了如何将流水线和处理器功能级模拟单元的耦合起来,构成时钟级模拟的整体框架。基于此框架,开发了ClkSim模拟器。经过SPEC CPU 2000的对比测试,ClkSim拥有较高的模拟性能和精度。

关键词: 功能级, 时钟级, 时序制导, 处理器模拟

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