Abstract: A memory controller for H.264/AVC encoder is proposed based on bandwidth and schedule strategy analysis.The memory access patterns of H.264/AVC encoder are considered for suitable controller architecture designing.Several scheduling strategies，such as round-robin，fixed priority and preemptive are implemented for performance comparison of DRAM controller.Additionally，a referred memory mapping method has been used to improve memory bandwidth by reducing the overhead cycle of page-activation.Experiment results show that the proposed preemptive architecture has the highest bandwidth utilization，and can be used for real application of 1080p HDTV at 150 MHz.

摘要： 在分析H.264/AVC编码过程中存储器带宽需求的基础上，提出一种DRAM控制器结构，并实现了几种不同调度策略的DRAM控制器结构设计。实现了令牌环、固定优先级和抢占式等三种结构，结合已有的存储空间映射方法，通过减少换行及Bank切换过程中的冗余周期，进一步提高存储器的带宽利用率。实验结果表明，提出的三种存储器结构中抢占式调度具有最高的宽利用率，可满足150 MHz时钟频率条件下HDTV1080P实时编码的应用。