Abstract: A FPGA architecture is proposed for image restoration in which the observed image is contaminated by multiplicative noise.The circuit implements the Van Cittert algorithm.The proposed circuit is designed to execute grouping filter operation after researching the symmetry of the point spread function.Thereby，the architecture reduces the requirement for the number of the multiplying units.The resource in FPGA is used effectively.The speed of the circuit is improved clearly by the use of pipeline and parallel technology.The experimental results show that the circuit has more faster speed and less number of logic cells.

Key words: image restoration, iterative computation, parallel filtering, Field Programmable Gate Array（FPGA）

摘要： 提出了一种基于Van Cittert迭代方法对被乘性噪声污染的观测图像快速复原处理的FPGA电路实现方法。通过研究点扩展函数的对称性，将图像邻域内的像素进行分组滤波运算，明显减少了电路对乘法器数量的要求，有效地利用了FPGA的资源，适当地安排流水线和并行处理单元显著地提高了芯片的运行速度。实验结果表明，对于相同的图像复原处理任务，提出的电路结构需要的逻辑单元数量更少，时间消耗更短。

关键词: 图像复原, 迭代计算, 并行滤波, 现场可编程门阵列