Computer Engineering and Applications ›› 2020, Vol. 56 ›› Issue (22): 244-250.DOI: 10.3778/j.issn.1002-8331.1908-0375

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Design of Multi-core Parallel Spiking Neural Network Simulator

LIU Jiahua, CHEN Jingyu   

  1. College of Computer, Guangdong University of Technology, Guangzhou 510006, China
  • Online:2020-11-15 Published:2020-11-13

多核并行脉冲神经网络模拟器的设计

刘家华,陈靖宇   

  1. 广东工业大学 计算机学院,广州 510006

Abstract:

Spiking neural networks are the third-generation artificial neural networks, which are more bio-interpretable neural network models. With the continuous research on spiking neural networks, not only the spatial structure of neurons is more complicated, but also the scale of neural network structure increases. In the form of serial computing, it is difficult to simulate the spiking neural network on a personal computer. To this end, a multi-core parallel spiking neural network simulator is designed to encode and map neurons. The custom routing table solves the network communication between multiple cores, and uses time-driven strategy to achieve dynamic synchronization between core and core. Parallel computing of spiking neural networks is performed on the simulator. Using Izhikevich spiking neurons as a model, experimental results in the simulation environment show that, multi-core parallel computing is about twice as efficient as traditional serial computing, provides a reference for the parallel design of similar spiking neural networks.

Key words: spiking neural network, parallel computing, neuron coding, routing table, periodic dynamic synchronization

摘要:

脉冲神经网络属于第三代人工神经网络,它是更具有生物可解释性的神经网络模型。随着人们对脉冲神经网络不断深入地研究,不仅神经元空间结构更为复杂,而且神经网络结构规模也随之增大。以串行计算的方式,难以在个人计算机上实现脉冲神经网络的模拟仿真。为此,设计了一个多核并行的脉冲神经网络模拟器,对神经元进行编码与映射,自定义路由表解决了多核间的网络通信,以时间驱动为策略,实现核与核间的动态同步,在模拟器上进行脉冲神经网络的并行计算。以Izhikevich脉冲神经元为模型,在模拟环境下进行仿真实验,结果表明多核并行计算相比传统的串行计算在效率方面约有两倍的提升,可为类似的脉冲神经网络的模拟并行化设计提供参考。

关键词: 脉冲神经网络, 并行计算, 神经元编码, 路由表, 周期动态同步