Computer Engineering and Applications ›› 2017, Vol. 53 ›› Issue (20): 38-42.DOI: 10.3778/j.issn.1002-8331.1606-0144

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Design and implementation for physical layer of serial ATA revision 3.0 based on FPGA

YANG Yatao1, ZHANG Songtao1, LI Zichen1,2, WANG Peidong1, QU Ming1   

  1. 1.Beijing Electronic Science & Technology Institute, Beijing 100070, China
    2.Beijing Institute of Graphic Communication, Beijing 102600, China
  • Online:2017-10-15 Published:2017-10-31

SATA 3.0物理层设计与FPGA实现

杨亚涛1,张松涛1,李子臣1,2,王培东1,曲  鸣1   

  1. 1.北京电子科技学院,北京 100070
    2.北京印刷学院,北京 102600

Abstract: Serial ATA interface standard has become one of the important applications of data storage and high-speed data transmission. Research and implementation on it has caused extensive concern. The key techniques of out of band signals, link initialization and rate configuration have been researched firstly, then the modules of out of band signal time sequence and initialization state machine are designed based on RocketIO GTX transceivers, which is built-in the FPGA of Virtex-5 family. Moreover, the physical layer of serial ATA revision 3.0 has been implemented. Compared with existing designs, the scheme has a better performance in the expansibility and configurability. The simulation result shows that its transfer rate has a great increasing, which works nearly at 6 Gb/s.

Key words: serial advanced technology attachment, physical layer, out of band signals, RocketIO GTX transceiver, link initialization

摘要: SATA接口标准已成为数据存储和高速数据传输的重要应用之一,对SATA3.0接口标准的研究和实现已引起广泛关注。首先探究了带外信号、上电初始化和速率配置等关键技术,然后基于Virtex-5系列FPGA内置的RocketIO GTX收发器,设计了带外信号时序、初始化状态机等模块,实现了符合SATA标准3.0的物理层。与现有方案相比,该设计具有易扩展、可配置等特点。经仿真测试,传输速率接近6 Gb/s,相比现有设计有较大提升。

关键词: 串行高级技术附件, 物理层, 带外信号, RocketIO GTX收发器, 链路初始化