Computer Engineering and Applications ›› 2009, Vol. 45 ›› Issue (36): 54-59.DOI: 10.3778/j.issn.1002-8331.2009.36.017
• 研发、设计、测试 • Previous Articles Next Articles
MA Sheng,HUANG Li-bo,WANG Zhi-ying,LIU Cong,DAI Kui
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马 胜,黄立波,王志英,刘 聪,戴 葵
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Abstract: Subword-parallel adder can efficiently improve the performance of multimedia application.Based on the gate-delay model,this paper analyzes the design and performance of those scalar adders and presents two control mechanisms for subword-parallel:Carry truncation and carry elimination.Under the guidance of those two mechanisms,this paper implements several different subword-parallel adders and analyzes their performances.The results show that the carry elimination mechanism has shorter delay,fewer gates and lower power consumption than carry truncation mechanism.Among those subword-parallel adders,Kogge-Stone adder has the shortest delay and ripple carry adder has the fewest gates and lowest power.The research results presented in this paper can be used to guide the design and selection of subword-parallel adders.
摘要: 子字并行加法器能够有效提高多媒体应用程序的处理性能。基于门延迟模型对加法器原理及性能进行了分析,设计了进位截断和进位消除两种子字并行控制机制。在这两种机制的指导下,实现了多种子字并行加法器,并对它们的性能进行了比较和分析。结果表明进位消除机制相对于进位截断机制需要较短的延时,较少的逻辑门数以及较低的功耗。在各种子字并行加法器中,Kogge-Stone加法器具有最少的延迟时间,RCA加法器具有最少的逻辑门数和最低的功耗。研究结果可以用于指导子字并行加法器的设计与选择。
CLC Number:
TP301.6
MA Sheng,HUANG Li-bo,WANG Zhi-ying,LIU Cong,DAI Kui. Research and implementation of subword-parallel adder[J]. Computer Engineering and Applications, 2009, 45(36): 54-59.
马 胜,黄立波,王志英,刘 聪,戴 葵. 子字并行加法器的研究与实现[J]. 计算机工程与应用, 2009, 45(36): 54-59.
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URL: http://cea.ceaj.org/EN/10.3778/j.issn.1002-8331.2009.36.017
http://cea.ceaj.org/EN/Y2009/V45/I36/54