Speech recognition system on FPGA and Nios II softcore

doi:10.3778/j.issn.1002-8331.2010.02.019

Computer Engineering and Applications ›› 2010, Vol. 46 ›› Issue (2): 60-62.DOI: 10.3778/j.issn.1002-8331.2010.02.019

• 研发、设计、测试 • Previous Articles Next Articles

Speech recognition system on FPGA and Nios II softcore

CHAO Yi-bo，ZHANG Xi-huang

College of Information Technology，Jiangnan University，Wuxi，Jiangsu 214122，China

Received:2008-10-07 Revised:2009-01-07 Online:2010-01-11 Published:2010-01-11
Contact: CHAO Yi-bo

FPGA和NiosII软核的语音识别系统的研究

巢一波，张曦煌

江南大学信息工程学院，江苏无锡 214122

通讯作者: 巢一波

Abstract

Abstract: There are a few applications of speech recognition in embeded system，mainly emplemented by DSP，and the accuracy is low.An embedded speech recognition system based on FPGA and NiosII is recommended.The design uses EP2C35 Cyclone II chip，NiosII processor and combines software with hardware.Combined with advanced endpoint detection method，the audio signal feature in this system，is the Linear Prediction Cepstrum Coefficient（LPCC） and recognition algorithm is Dynamic Time Warping（DTW） by IP core.The system reaches high speech recognition accuracy.

Key words: speech recognition, Field Programmable Gate Array（FPGA）, Linear Prediction Cepstrum Coefficient（LPCC）, Dynamic Time Warping（DTW）, IP core

摘要： 嵌入式语音识别的应用还是比较少，主要还是通过DSP实现，而且准确率还不是太高。提出一种基于FPGA和NiosII软核处理器的嵌入式语音识别系统的设计方案。系统以EP2C35 Cyclone II芯片和NiosII处理器为基础，采用软硬件结合的设计方式，共同完成语音识别的设计。系统结合改进的端点检测方法，提取线性预测倒谱系数（LPCC）的音频信号特征，采用IP核硬件实现动态时间规整（DTW）的识别算法，能达到较高的识别准确率。

关键词: 语音识别, 现场可编程门阵列, 线性预测倒谱系数, 动态时间规整, IP核

CLC Number:

TP302.1

CHAO Yi-bo，ZHANG Xi-huang. Speech recognition system on FPGA and Nios II softcore[J]. Computer Engineering and Applications, 2010, 46(2): 60-62.

巢一波，张曦煌. FPGA和NiosII软核的语音识别系统的研究[J]. 计算机工程与应用, 2010, 46(2): 60-62.

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Speech recognition system on FPGA and Nios II softcore

FPGA和NiosII软核的语音识别系统的研究

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