关键词: 图像复原, 迭代计算, 并行滤波, 现场可编程门阵列

Abstract: A FPGA architecture is proposed for image restoration in which the observed image is contaminated by multiplicative noise.The circuit implements the Van Cittert algorithm.The proposed circuit is designed to execute grouping filter operation after researching the symmetry of the point spread function.Thereby，the architecture reduces the requirement for the number of the multiplying units.The resource in FPGA is used effectively.The speed of the circuit is improved clearly by the use of pipeline and parallel technology.The experimental results show that the circuit has more faster speed and less number of logic cells.

Key words: image restoration, iterative computation, parallel filtering, Field Programmable Gate Array（FPGA）