关键词: AES加密算法, 非流水线, 密钥扩展, 现场可编程门阵列（FPGA）

Abstract:

A full-universal AES（Advanced Encryption Standard） encryption algorithm is proposed for the AES algorithm to be compatible with different working modes and different key lengths. The algorithm implements 128/192/256-bit wide encryption by designing an adjustable key expansion module, and supports the ECB/CBC/CFB/OFB/CTR 5 operating modes by the mode selection module. Based on Xilinx’s XC7VX690T FPGA simulation, the resource consumption is 1947 Slices, and the maximum operating frequency is 348.191 MHz.

Key words: AES encryption algorithm, non-pipeline, key expansion, Field-Programmable Gate Array（FPGA）