计算机工程与应用 ›› 2020, Vol. 56 ›› Issue (13): 72-76.DOI: 10.3778/j.issn.1002-8331.1906-0031

• 理论与研发 • 上一篇    下一篇

基于FPGA内存数据保护技术的设计与实现

李仁刚,任智新,王江为,阚宏伟,张闯,公维锋   

  1. 1.高效能服务器和存储技术国家重点实验室,济南 250013
    2.浪潮电子信息产业股份有限公司,济南 250013
  • 出版日期:2020-07-01 发布日期:2020-07-02

Design and Implementation of Memory Data Protection Technology Based on FPGA

LI Rengang, REN Zhixin, WANG Jiangwei, KAN Hongwei, ZHANG Chuang, GONG Weifeng   

  1. 1.State Key Laboratory of High-End Server & Storage Technology, Jinan 250013, China
    2.Inspur Electronic Information Industry Co., Ltd., Jinan 250013, China
  • Online:2020-07-01 Published:2020-07-02

摘要:

为了提高内存数据的可靠性,内存保护技术正广泛应用在高端容错计算机中。为此,提出了以现场可编程门阵列(FPGA)为控制器实现一拖二的内存热备份技术,对内存数据进行高效的保护。分析FPGA内部接口IP的延时后,提出了采用FPGA原语实现双倍数据速率(DDR)数据的采集与处理方法。搭建了以镁光的同步动态随机存取存储器(SDRAM)颗粒为控制对象的仿真模型,验证了该方法的有效性。阐述了以赛灵思公司的FPGA芯片做主控器,实现内存热备份功能的应用实例。该方法不仅可有效保护内存数据,由于FPGA的可编程性,使计算机系统具备了在线扩展(容量)、在线升级内存的功能,可以满足特殊行业不宕机、实时容错的要求。

关键词: 内存保护, 内存热备份, 现场可编程门阵列(FPGA), 容错计算机

Abstract:

To improve the reliability of memory, memory protection is used in high-end fault-tolerant computers. This paper proposes a one-to-two memory ProteXion with a Field Programmable Gate Array(FPGA). After analyzing the delay of IP of FPGA, a method of processing DDR interface using FPGA primitive is proposed. The simulation model with Micron DRAM is builted successfully. Finally, an application example of using the chip of Xilinx as the controller to realize the memory mirroring function is described. The computer has the functions of on-line expansion and on-line memory upgrade, which can meet the requirements of no downtime and real-time fault tolerance in special industries.

Key words: memory protection, memory mirroring, Field Programmable Gate Array(FPGA), fault-tolerant computer