计算机工程与应用 ›› 2018, Vol. 54 ›› Issue (23): 36-41.DOI: 10.3778/j.issn.1002-8331.1712-0074

• 理论与研发 • 上一篇    下一篇

面向国产CPU的可重构计算系统设计及性能探究

彭福来,于治楼,陈乃阔,耿士华,李凯一   

  1. 山东超越数控电子股份有限公司,山东省特种计算机重点实验室,济南 250104
  • 出版日期:2018-12-01 发布日期:2018-11-30

Reconfigurable computing system design and performance exploration towards to domestic CPU

PENG Fulai, YU Zhilou, CHEN Naikuo, GENG Shihua, LI Kaiyi   

  1. Shandong Chaoyue Digital Control Electronics Co., Ltd, Shandong Special Computer Key Laboratory, Jinan 250104, China
  • Online:2018-12-01 Published:2018-11-30

摘要: 为了提升国产平台的计算性能,采用国产CPU+FPGA的异构架构,设计了基于国产CPU的可重构计算系统。该系统包括基于国产CPU的主机单元和FPGA可重构加速单元,主机单元负责逻辑判断与管理调度等任务,FPGA负责对计算密集型任务进行加速,并采用OpenCL框架模型进行编程,以缩短FPGA的开发周期。为了验证该系统的性能,采用AES加密算法来测试该系统的计算性能,通过对不同长度的明文进行AES加密测试,并与CPU串行处理结果进行对比,得出:相比于单核FT-1500A CPU串行加密方式,采用可重构计算系统并行加密能够获得120多倍的加速比,且此加速比会随着明文长度的增加而成非线性增大。实验结果表明:基于国产CPU的可重构计算系统能够大幅提升国产平台的计算性能。

关键词: 可重构计算, 国产CPU, 现场可编程门阵列(FPGA), AES算法, OpenCL

Abstract: In order to improve the performance of domestic computing system, this paper designs a reconfigurable computing system based on domestic CPU. The system consists of host unit based on domestic CPU and FPGA reconfigurable accelerator unit. The CPU acting as the host unit is responsible for logical judgement and task scheduling, while the FPGA is responsible for accelerating the computation task. In order to shorten the FPGA development cycle, the OpenCL framework standard is adopted. To test the peroformance of this system, the AES encryptions with varied length plaintext are tested, compared with the results of CPU serial processing. The system can acquire more than 120 times speedup compared to single FT-1500A CPU core. Experimental results demonstrate that the proposed reconfigurable computing system can improve the computing performance of domestic platform significantly.

Key words: reconfigurable computing system, domestic CPU, Field-Programmable Gate Array(FPGA), AES algorithm, OpenCL