关键词: 芯核复用技术, 现场可编程门阵列（FPGA）, 查找表, 芯核水印

Abstract: IP （Intellectual Property） reuse is a critical technology for shortening design cycle and reducing design cost of the chip. However, it is easily attacked by illegal users in real-world IP protection. In this paper, a robust IP watermarking algorithm based on bitfile is proposed. The random sequence is generated for determining positions of unused LUTs, which are used to insert watermarks. The information for LUTs in bitfile are scattered for insertion of different watermarks. Once the watermark extraction is activated, it can use the reconfiguration of FPGA （Field Programmable Gate Array） and extract watermarks in corresponding LUTs in order. The experimental results on Virtex XCV600-6bg432 show that the proposed algorithm has no impact on logic function of IP circuit and is superior in strengthened robustness and has low （resource） overhead by comparing with other algorithms.

Key words: Intellectual Property（IP） reuse, Field Programmable Gate Array（FPGA）, Look Up Table（LUT）, Intellectual Property（IP） watermarking