计算机工程与应用 ›› 2007, Vol. 43 ›› Issue (4): 150-152.
• 网络、通信与安全 • 上一篇 下一篇
毛席龙 孙志刚
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摘要: IP报文封装为链路帧是路由器设计必不可少的技术。本文提出了一种通用的多通道报文封装和转发的处理器结构,利用FPGA内部存储资源,采用流水线和多队列缓存区相结合,显著提高了小报文线速转发和突发流量传输的性能。
关键词: 流水线, 多队列, 报文转发
Abstract: IP packets encapsulation as link layer frames is necessary to a router design. In this paper we present an universal processor architecture for multi-channel packets encapsulation and forwarding, combined with FPGA embedded memory blocks, pipeline and multi-queue buffer mechanism, which improved the capability of short packets forwarding at wire-speed or burst flow transfer.
Key words: Pipeline, Multi-queue, Packets Forwarding
毛席龙 孙志刚. 交叉流水线多队列缓冲报文转发技术[J]. 计算机工程与应用, 2007, 43(4): 150-152.
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http://cea.ceaj.org/CN/Y2007/V43/I4/150