计算机工程与应用 ›› 2009, Vol. 45 ›› Issue (3): 77-80.DOI: 10.3778/j.issn.1002-8331.2009.03.022

• 研发、设计、测试 • 上一篇    下一篇

具有高速递归结构的基-4MAP译码器

张 成,苏文艳,刘 亮,叶 凡,任俊彦   

  1. 复旦大学 专用集成电路与系统国家重点实验室 复旦大学微纳电子科技创新平台,上海 201203
  • 收稿日期:2008-07-07 修回日期:2008-10-13 出版日期:2009-01-21 发布日期:2009-01-21
  • 通讯作者: 张 成

Radix-4 MAP decoder with fast recursion architecture

ZHANG Cheng,SU Wen-yan,LIU Liang,YE Fan,REN Jun-yan   

  1. State Key Laboratory of ASIC and System,Micro/Nanoelectronics Science and Technology Innovation Platform,Fudan University,Shanghai 201203,China
  • Received:2008-07-07 Revised:2008-10-13 Online:2009-01-21 Published:2009-01-21
  • Contact: ZHANG Cheng

摘要: Turbo码在许多无线通信系统中展示了其良好的纠错性能。但是由于MAP算法中的递归运算限制,提高Turbo译码器的吞吐率是非常困难的。提出了一种新颖的MAP译码器结构。这种结构改进了基-4MAP译码器中的迭代结构以提高吞吐率,同时减少了以往基-4算法所引入的编码增益损耗。此外,该结构还采用了一种新的分块译码策略以减少译码器所需要的存储器数量。仿真与综合结果表明这种译码器结构提高了21%的吞吐率,而所引入的硬件开销增加可以忽略不计。

关键词: 差错控制编码, turbo码, 最大后验概率算法, 高吞吐率

Abstract: Turbo code has shown its outstanding error-correcting performance in many wireless communication systems.However,turbo decoder’s throughput is highly restricted by the recursion calculation of the MAP algorithm.In this paper,a new architecture of MAP decoder is presented.It improves the recursion architecture in the Radix-4 MAP decoder in order to gain higher throughput,meanwhile the modification could reduce the coding gain loss induced by the approximation of the previous Radix-4 algorithm.A new block decode strategy is also adopted to reduce the memory cost in the MAP decoder.Simulation and synthesis result shows the proposed architecture could increase the throughput by 21%,while its hardware complexity increase is negligible.

Key words: error-correcting code, turbo code, Max A Posterior(MAP) algorithm, high-throughput