计算机工程与应用 ›› 2008, Vol. 44 ›› Issue (18): 83-86.

• 研发、设计、测试 • 上一篇    下一篇

一种基于GEP的演化硬件复杂电路优化算法

李康顺1,2,梁九生1,张文生2,李元香3   

  1. 1.江西理工大学 信息工程学院,江西 赣州 341000
    2.中国科学院 自动化研究所,北京 100083
    3.武汉大学 软件工程国家重点实验室,武汉 430072
  • 收稿日期:2007-09-25 修回日期:2007-12-10 出版日期:2008-06-21 发布日期:2008-06-21
  • 通讯作者: 李康顺

Optimization algorithm for complicated circuit based on GEP

LI Kang-shun1,2,LIANG Jiu-sheng1,ZHANG Wen-sheng2,LI Yuan-xiang3   

  1. 1.School of Information Engineering,Jiangxi University of Science & Technology,Ganzhou,Jiangxi 341000,China
    2.Institute of Automation,Chinese Academy of Sciences,Beijing 100083,China
    3.State Key Laboratory of Software Engineering,Wuhan University,Wuhan 430072,China
  • Received:2007-09-25 Revised:2007-12-10 Online:2008-06-21 Published:2008-06-21
  • Contact: LI Kang-shun

摘要: 演化硬件是近年来新兴的研究热点,它是演化算法和可编程逻辑器件相结合而形成的硬件设计新方法。在演化硬件中门电路的优化设计是一个重要的研究领域。提出一种新的基于基因表达式程序设计(GEP)的算法来进行复杂优化电路的设计,通过仿真实验表明,该算法不仅收敛速度快,而且还能利用该算法优化大规模的门电路,克服了传统优化方法的求解速度慢甚至不收敛等缺点。该算法较传统的电路优化方法更简单、更高效。

Abstract: Evolutionary Hardware(EHW) is a new focus in recent research work.The new method of design hardware is to combine evolution algorithm with programmable logic device.Optimization gate circuit is a main research domain of EHW.A new algorithm to optimize the complicated circuit by using Gene Expression Programming(GEP) is proposed in this paper.The experiments demonstrate that this algorithm has not only fast convergent speed but also it can be used to optimize large scale of circuit structure efficiently and conquers the slow convergent speed even no convergence compared with traditional methods.