关键词: 卷积神经网络, Verilog, 现场可编程门阵列（FPGA）, MNIST数据库, 数字识别

Abstract:

The classical network model of digital recognition is mainly BP neural network and convolution neural network. Compared with convolution neural network, the recognition effect of convolution neural network is better, and it is more suitable to deal with the problem of image recognition. At present, convolution neural networks are mostly implemented by software, and hardware has the advantages of parallelism and high speed. Therefore, this paper intends to use hardware description language（Verilog） to implement convolution neural network, in order to ensure high recognition rate, fully tap the advantages of hardware implementation. By studying the working principle and structure of the network, the complete circuit model is constructed, and the implementation scheme of Field Programmable Gate Array（FPGA） is given. Convolution neural network trains 60?000 digital sample images in MNIST database through back propagation, extracts the weight and offset with the highest accuracy, and then carries on the forward propagation of the network to complete the digital recognition. The complete process is realized with the help of ModelSim and Quartus II simulation tools. The results show that all the samples take 50?ms to train under the 100?MHz clock. Compared with the software implementation, the speed is obviously improved, the real-time performance of the hardware design is satisfied, and the accuracy is up to 95.4%. This research provides a method and strategy for image recognition of embedded devices, and has practical application value.

Key words: convolution neural network, Verilog, Field Programmable Gate Array（FPGA）, MNIST database, number recognition