关键词: 信号完整性, 串扰, 可满足性, 时延测试

Abstract: With the continuous improvement of deep submicron technology and chip operating rate, crosstalk noise becomes more and more serious. It is high time to test crosstalk delay. Based on combinational circuit, the SAT（Boolean satisfiability） method is introduced to the crosstalk induced delay test, and lexical analysis and syntax analysis are used to extract the formal model of a Verilog（Hardware Description Language） source code directly to combine into CNF （Conjunctive Normal Form）. Using non-robust tests, the crosstalk delay is activated, and CNF expressions are simplified. Finally, the testing vectors are obtained by inputting the SAT solver. By assessing on ISCAS’85 benchmark circuits, experimental results show that the algorithm is effective for crosstalk-induced delay faults.

Key words: Signal Integrity（SI）, crosstalk, SAT, delay faults testing