基于SRAM和STT-RAM的混合指令Cache设计

计算机工程与应用 ›› 2015, Vol. 51 ›› Issue (12): 43-48.

基于SRAM和STT-RAM的混合指令Cache设计

皇甫晓妍，樊晓桠，黄小平

西北工业大学计算机学院，西安 710129

出版日期:2015-06-15 发布日期:2015-06-30

Design of hybrid instruction Cache based on SRAM and STT-RAM

HUANGFU Xiaoyan, FAN Xiaoya, HUANG Xiaoping

School of Computer Science, Northwestern Polytechnical University, Xi’an 710129, China

Online:2015-06-15 Published:2015-06-30

摘要/Abstract

摘要： 随着工艺尺寸减小，传统基于SRAM的片上Cache的漏电流功耗成指数增长，阻碍了片上Cache容量的增加。基于牺牲者Cache的原理，利用SRAM写速度快，STT-RAM的非易失性、高密度、极低漏电流功耗等特性设计了一种基于SRAM和STT-RAM的混合型指令Cache。通过实验证明，该混合型指令Cache与传统基于SRAM的指令Cache相比，在不增加指令Cache面积的情况下，增加了指令Cache容量，并显著提高了指令Cache的命中率。

关键词: 自旋转移力矩随机存储器（STT-RAM）, 指令Cache, 混合Cache

Abstract: With the decrease of the grain size, the leakage power of traditional on-chip SRAM-based Cache increases exponentially, which hinders the increase of capacity of Cache on chip. As SRAM’s write speed is faster and STT-RAM is non-volatile, high density and very low leakage power, this paper designs a hybrid instruction Cache with SRAM and STT-RAM. The experimental results show that, compared with the SRAM-based instruction Cache, the hybrid instruction Cache increases capacity and significantly improves the hit rate without increasing the area.

Key words: Spin-Transfer Torque Random Access Memory（STT-RAM）, instruction Cache, hybrid Cache

皇甫晓妍，樊晓桠，黄小平. 基于SRAM和STT-RAM的混合指令Cache设计[J]. 计算机工程与应用, 2015, 51(12): 43-48.

HUANGFU Xiaoyan, FAN Xiaoya, HUANG Xiaoping. Design of hybrid instruction Cache based on SRAM and STT-RAM[J]. Computer Engineering and Applications, 2015, 51(12): 43-48.