关键词: 众核处理器, 功能验证, 覆盖率, 时序验证, 功耗评估

Abstract: Multi-core technology has become the inevitable trend of current processor architecture. It is an efficient and sufficient functional verification of the multi-core design that has become one of the hot points in IC design and verification fields, and also one of the key factors to the success final tape-out. Different from the common verification pattern based on emulation, this paper pays more attention in highlighting the overall functional verification environment design driven with the coverage functional verification strategy to verify RISC multi-core processor, and putting forward the idea of “passive authentication” with hardware and software co-verification strategy, ultimately achieves the goal of “single instruction comparison”. Timing verification and power evaluation strategies are also introduced in the later validation stage, providing a complete verification solution for the RISC multi-core processor.

Key words: multi-core processor, functional verification, coverage, timing verification, power evaluation