万兆以太网MAC层控制器的FPGA设计与实现

计算机工程与应用 ›› 2012, Vol. 48 ›› Issue (6): 77-79.

万兆以太网MAC层控制器的FPGA设计与实现

张友亮，刘志军，马成海，赵艳艳，张风

山东大学信息科学与工程学院，济南 250100

收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2012-02-21 发布日期:2012-02-21

Design and implementation of 10-Gigabit Ethernet MAC controller based on FPGA

ZHANG Youliang, LIU Zhijun, MA Chenghai, ZHAO Yanyan, ZHANG Feng

School of Information Science and Engineering, Shandong University, Jinan 250100, China

Received:1900-01-01 Revised:1900-01-01 Online:2012-02-21 Published:2012-02-21

摘要/Abstract

摘要： 根据IEEE802.3-2005和IEEE802.3ae标准，在Xilinx公司的Virtex6系列XC6VHX255T器件上设计实现了万兆以太网MAC层控制器。与千兆以太网相比，万兆以太网使用更宽的数据位宽和更高的时钟频率，这使得其MAC层控制器的设计和实现都面临新的挑战。在解决了数据并行处理、不定长字节CRC编码/校验及与千兆以太网兼容等问题的基础上，设计实现了万兆以太网MAC层控制器。经布局布线后仿真验证，说明该设计可满足万兆以太网实际应用的要求。

关键词: 万兆以太网, MAC通信协议, Virtex6 FPGA

Abstract: A 10-Gigabit Ethernet MAC controller is designed to the specifications of IEEE802.3-2005 and IEEE802.3ae by using a Xilinx XC6VHX255T device which belongs to the Virtex-6 device family. Compared with the 1-Gigabit Ethernet, 10-Gigabit Ethernet uses wider bit wide and higher frequency, which brings new difficulties to its design and implementation. A 10-Gigabit Ethernet MAC controller is designed on the base of solving the problem of parallel data processing, unfixed width CRC and compatibility with 1-Gigabit Ethernet. The results of post-place and route simulation indicate that the design can meet the needs of 10-Gigabit Ethernet.

Key words: 10-Gigabit Ethernet, MAC（Media Access Control）, Virtex6 FPGA（Field-Programmable Gate Array）

张友亮，刘志军，马成海，赵艳艳，张风. 万兆以太网MAC层控制器的FPGA设计与实现[J]. 计算机工程与应用, 2012, 48(6): 77-79.

ZHANG Youliang, LIU Zhijun, MA Chenghai, ZHAO Yanyan, ZHANG Feng. Design and implementation of 10-Gigabit Ethernet MAC controller based on FPGA[J]. Computer Engineering and Applications, 2012, 48(6): 77-79.