关键词: 片上调试器, 片上调试系统, 复杂指令集计算机（CISC）处理器, 联合测试行动组（JTAG）, 边界扫描

Abstract: A design scheme of debug system for embedded CISC processor based on JTAG protocol is put forward. A OCD（On-Chip-Debugger） is designed for JU-C2 processor which is a self-development processor used on teaching. USB-JTAG protocol convertor, control console on PC and self-build data scan chaining in CPU are also designed, which finally composes a complete debug system. The debug system can implement microinstruction and machine instruction step debug, breakpoint debug, processor internal registers examine and PC write, moreover, processor run/stop and reset commonly used debug function. It respectively introduces the system components and their principles, then tests the system to verify the correctness of the system work.The debug system is less invasive for the CPU internal data path, and has a certain degree of practicality in teaching.

Key words: On-Chip-Debugger（OCD）, on chip debug system, Complex Instruction Set Computer（CISC） processor, Joint Test Action Group（JTAG）, boundary scan