FPGA与DDR2 SDRAM互联的信号完整性分析

计算机工程与应用 ›› 2011, Vol. 47 ›› Issue (29): 158-160.

• 数据库、信号与信息处理 • 上一篇下一篇

FPGA与DDR2 SDRAM互联的信号完整性分析

吴长瑞，岑凡，蔡惠智

中国科学院声学研究所，北京 100190

收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2011-10-11 发布日期:2011-10-11

Analysis of signal integrity for interconnection between FPGA and DDR2 SDRAM

WU Changrui，CEN Fan，CAI Huizhi

Institute of Acoustics，Chinese Academy of Sciences，Beijing 100190，China

Received:1900-01-01 Revised:1900-01-01 Online:2011-10-11 Published:2011-10-11

摘要/Abstract

摘要： 论述了Virtex-5和DDR2?SDRAM在互联中的信号完整性问题，利用前仿和后仿的措施分析和验证了它们在不同互联拓扑结构下的信号完整性。通过原型机的测试，验证了该理论在高速电路设计中的应用有效性。

关键词: 信号完整性, 输入输出缓冲器信息规范模型, 高速印制电路板设计, HyperLynx仿真

Abstract: This paper describes the problem of signal integrity between Virtex-5 and DDR2 SDRAM interconnection.It analyzes its signal integrity on different topologies interconnection through the method of simulation before PCB routing and after the completion of PCB routing.The result of test on prototype machine demonstrates that such theory is effective in the design of high-speed circuit.

Key words: signal integrity, Input/Output Buffer Information Specification（IBIS） model, high-speed Printed Circuit Board（PCB） design, HyperLynx simulation

吴长瑞，岑凡，蔡惠智. FPGA与DDR2 SDRAM互联的信号完整性分析[J]. 计算机工程与应用, 2011, 47(29): 158-160.

WU Changrui，CEN Fan，CAI Huizhi . Analysis of signal integrity for interconnection between FPGA and DDR2 SDRAM[J]. Computer Engineering and Applications, 2011, 47(29): 158-160.

FPGA与DDR2 SDRAM互联的信号完整性分析

Analysis of signal integrity for interconnection between FPGA and DDR2 SDRAM

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