Abstract: CAVLC is adopted as a entropy coding method in baseline and extended profile in H.264/AVC standard，but the detailed syntax on which is not provided.A profound analysis on the CAVLC coding algorithm in H.264 standard is performed based on the principle of CALVC decoding method.A high-speed and low power-consumption CAVLC coder for H.264 standard is presented according to the former analysis.And the detailed design and FPGA realization method on each sub-blocks are also concerned.Besides，some optimizations on algorithm and architecture of complex sub-blocks are also performed to reduce complexity of hardware realization.Finally，FPGA verification and realization indicates that the maximum coding system clock can up to 100 MHz，which can adequately meet the needs of some high-speed and real-time applications.