计算机工程与应用 ›› 2007, Vol. 43 ›› Issue (8): 95-98.

• 产品、研发、测试 • 上一篇    下一篇

GF(2N)域上基于ONB的ECC芯片设计与实现

陈韬 郁滨   

  1. 信息工程大学电子技术学院 信息工程大学电子技术学院
  • 收稿日期:2006-03-16 修回日期:1900-01-01 出版日期:2007-03-11 发布日期:2007-03-11
  • 通讯作者: 陈韬

Design and Implementation of ECC Chip Based on ONB over GF(2^N)

  • Received:2006-03-16 Revised:1900-01-01 Online:2007-03-11 Published:2007-03-11

摘要: 本文分析了GF(2^N)域上的椭圆曲线的运算法则,提出了一种串-并行结构的基于优化正规基(ONB)的高速有限域运算单元,比较了域划分D对芯片实现速度和硬件资源占用的影响,完成了域GF(2^N)上基于ONB的ECC芯片快速实现。FPGA验证表明,GF(2^N)域上一次点加运算需要183个时钟,一次点倍运算需要175个时钟,完成一次求乘法逆运算的总时钟数为133。在50MHz时钟下,完整的点乘运算速度平均为981次/秒。

Abstract: This paper analysis the elliptic curves operation rules,presents a high speed serial-parallel elliptic curve multiplier for the Galois field GF(2^N) which based on optimal normal basis, compares the ECC chip speed and hardware resource consuming induced by the different Field partition. The proposed multiplier requires 183 clocks for point addition, 175 clocks for point doubling and 133 clocks for multiplicative inverse computing. The rate of point multiplication is about 981 per second after FPGA validation.