Abstract: The technologies of deep stage pipeline and out-of-order execution in microprocessor induce the hazard between sequential model and out-of-order execution, so the key problem is how to implement precise interrupt. To the deficiency of the existing method, this paper has proposed a method, which use backup-buffer to save the status of pipeline, can improve the efficiency of interrupt response. Section one and two analyze traditional implementation of precise interrupt. Section three discusses the mechanism of saving status by backup-buffer and the architecture of backup-buffer emphatically. Section four presents the implementation on the NWPU AMEC抯 full copyright microprocessor 揕ongtium?R2? Experiments show that this new method reduces the time of interrupt response 67%, the time of return from interrupt by 56%.