Abstract: Embedded processors always provide hardware support by irregular architectural features, due to the rigorous requirements of embedded systems at power and real-time, etc. Complex compilation optimizations are needed in order to make embedded processors function efficiently. This paper introduces MachineSUIF, a compilation research infrastructure, in which the implementation instances of several graph-coloring register allocation algorithms and their experimental results. It is emphasized that a flexible and extensible research infrastructure is the important basis for developing complex compilation optimizations rapidly in embedded domain.