计算机工程与应用 ›› 2007, Vol. 43 ›› Issue (2): 10-10.

• 博士论坛 • 上一篇    下一篇

FFT处理机的形式化模型及正确性验证

张欢欢,宋国新   

  1. 华东理工大学
  • 收稿日期:2006-10-06 修回日期:1900-01-01 出版日期:2007-01-11 发布日期:2007-01-11
  • 通讯作者: 张欢欢 troy100

a formal model of FFT processor and its verification

Huan-Huan ZHANG,Guo-Xin SONG   

  1. 华东理工大学
  • Received:2006-10-06 Revised:1900-01-01 Online:2007-01-11 Published:2007-01-11
  • Contact: Huan-Huan ZHANG

摘要: 快速傅立叶变换的应用领域非常广泛,其硬件实现方法多种多样,验证这些电路的正确性具有很强的实用价值。传统的电路正确性验证的方法是模拟,这种方法的主要缺点是随着参与运算的点数的增加,穷尽模拟全部输入情况所耗费的时间越来越长,甚至难以实现。而形式化方法使用纯数学手段证明电路的正确性,克服了传统方法的缺点。本文首先用重写系统给出了任意N=2M点的基2的流水式快速傅里叶变换处理机的形式化模型,然后给出它的正确性验证,探索了验证处理复数的复杂电路正确性的方法。

关键词: 重写, 形式化, 描述, 验证, 归纳, 快速傅里叶变换处理机

Abstract: Fast Fourier Transform (FFT) has a wide range of usage; it also has many various ways of hardware implements. Simulation is a traditional way for hardware verifying, the main weakness of this method is that it is a hard work (sometimes it is impossible) to give all kinds of input that the circuit may have. On the contrast, formal methods can use pure mathematical methods to verify a circuit’s properties. That is why exploring new ways to verify the correctness of FFT hardware circuits using formal method is important. This paper presents a formal model of Radix-2 FFT processor using Rewriting System and verifies that it can process complex data properly. These explore a new way to verify complex circuit.

Key words: rewriting, formal method, specification, verify, induction, FFT processor