计算机工程与应用 ›› 2011, Vol. 47 ›› Issue (2): 62-64.DOI: 10.3778/j.issn.1002-8331.2011.02.020

• 研发、设计、测试 • 上一篇    下一篇

多相位数据转换跟踪环的抖动测试

李欣未,沈 雷,赵知劲   

  1. 杭州电子科技大学 通信工程学院,杭州 310018
  • 收稿日期:2010-07-29 修回日期:2010-09-09 出版日期:2011-01-11 发布日期:2011-01-11
  • 通讯作者: 李欣未

Jitter test of multiphase DTTL

LI Xinwei,SHEN Lei,ZHAO Zhijin   

  1. School of Telecommunication Engineering,Hangzhou Dianzi University,Hangzhou 310018,China
  • Received:2010-07-29 Revised:2010-09-09 Online:2011-01-11 Published:2011-01-11
  • Contact: LI Xinwei

摘要: 根据高速、高精度锁相环抖动测量的需要,在基于单相位数据转换跟踪环的抖动测试模型的基础下,提出一种基于Xilinx芯片的多相位数据转换跟踪环的抖动测试算法。根据这两种方法的抖动测试模型,比较各自的抖动误差表达式,并采用Xilinx芯片定点仿真。理论分析和仿真结果均表明,在采样周期一致的情况下,多相位的抖动误差测试精度相较于单相位的抖动测试精度相应倍数的提高。该方法缓解了Xilinx芯片中时钟限制,提高了SDH抖动测试精度。

关键词: 多相位, 光通信, 抖动测试, Xilinx

Abstract: According to the needs of high-speed,high-precision jitter measurement on Phase Locked Loop(PLL),based on the single phase Data Transition Tracking Loop(DTTL) of the jitter test model,a new jitter testing algorithm of multi-phase DTTL based on Xilinx chip is proposed.On the basis of these two jitter test models,their respective jitter error expression is compared,and fixed-point simulated using Xilinx chip.Theoretical analysis and simulation results show that,in the case of the same sampling period,compared to the single-phase of jitter measurement accuracy,the multi-phase jitter error of measurement accuracy corresponding increase in multiples.The method eases the clock limits on Xilinx chip,increases SDH jitter measurement accuracy.

Key words: multiphase, optical communication, jitter test, Xilinx

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