计算机工程与应用 ›› 2009, Vol. 45 ›› Issue (4): 86-88.DOI: 10.3778/j.issn.1002-8331.2009.04.024

• 研发、设计、测试 • 上一篇    下一篇

嵌入式GPS接收机系统的FPGA配置方法研究

王尔申,张淑芳,胡 青   

  1. 大连海事大学 信息工程学院,辽宁 大连 116026
  • 收稿日期:2008-01-14 修回日期:2008-03-28 出版日期:2009-02-01 发布日期:2009-02-01
  • 通讯作者: 王尔申

Research of FPGA configuration methods of embedded GPS receiver system

WANG Er-shen,ZHANG Shu-fang,HU Qing   

  1. Information Engineering College,Dalian Maritime University,Dalian,Liaoning 116026,China
  • Received:2008-01-14 Revised:2008-03-28 Online:2009-02-01 Published:2009-02-01
  • Contact: WANG Er-shen

摘要: 给出了嵌入式GPS接收机系统的整体设计,重点研究了系统中FPGA的不同配置方法,提出了利用CPLD和Platform Flash、SPI Flash、Intel NOR Flash实现对FPGA进行不同配置的方法,详细分析了每种配置方法的特点,给出具体的硬件电路设计,并重点研究了利用Intel NOR Flash进行BPI配置的流程以及配置时应注意的问题。这些配置方式在研究的嵌入式GPS接收机系统中得到了成功的应用,而且也适用于其他的类似系统。

Abstract: An overall design of an embedded GPS receiver system which focuses on different FPGA configuration is proposed in this paper.Using CPLD,Platform Flash,SPI Flash and Intel NOR Flash,different methods of FPGA configuration have been discussed respectively.Each detailed analysis of characteristics and specific hardware circuit design are figured out.Especially,the flow and notes of BPI configuration by Intel NOR Flash are emphasized here,and these kinds of configurations have been applied in the research of embedded GPS receiver system successfully.Moreover,it is also applicable to other similar systems.