关键词: 微系统, 系统级封装（SIP）, 卷积神经网络（CNN）, 数字识别

Abstract:

In recent years, microelectronics technology has entered the era of nanoelectronics/integrated microsystems. SIP（System in Package） and SOC（System on Chip） are two important technical approaches for the realization of microsystems. Deep learning technology based on neural network is widely used in computer vision and target recognition areas. How to combine lightweight neural network with micro system to achieve the optimal balance of performance, volume and power consumption is a difficult problem. The miniaturization of embedded platforms for deep learning technology of convolutional neural networks is an important research field. This article introduces a microsystem implementation scheme that combines SIP technology and FPGA-based convolutional neural network. It uses Zynq SOC, FLASH, and DDR3 memory as the main components, and uses SIP high-density system packaging technology for integration. The PL end（FPGA） uses HLS to design the convolutional layer and pooling layer in CNN（Convolutional Neural Network）, generate IP cores, and time-multiplex to build a micro system. Micro_VGGNet lightweight model is designed and implemented. The test uses the MNIST handwritten digit data set as training and test samples. The microsystem can accurately recognize handwritten digits with an accuracy rate of 98.1%. The volume is only 30 mm×30 mm×1.2 mm, and the image processing speed can reach 20.65 FPS at a working frequency of 100 MHz. The power consumption is only 2.1 W. The multi-objective balance（performance, volume and power consumption） of lightweight neural network microsystem is realized.

Key words: microsystem, System in Package（SIP）, Convolutional Neural Network（CNN）, digit recognition