关键词: 卷积神经网络, 嵌入式设备, 动态多精度定点数据量化, 并行卷积运算硬件架构

Abstract:

In recent years, neural network models become more and more complex. Aiming at the large memory space required for convolutional neural network inference calculations, which limits its deployment on embedded devices, a dynamic multi-precision fixed-point data quantization hardware structure is proposed. It uses fixed-point data instead of floating-point data during neural network inference to perform convolutional operations. The results show that compared with the static quantization strategy, using a 16 bit fixed-point dynamic quantization and parallel convolutional operation hardware architecture, data accuracy is up to 97.96%. The hardware unit area is only 13740 gates, and the memory footprint and bandwidth requirement are reduced 50%. In addition, compared with Cortex M4, which performs convolutional operations using floating-point data, the embedded system SoC performance is improved more than 90%.

Key words: convolutional neural network, embedded devices, dynamic multi-precision fixed-point data quantization, parallel convolutional operation hardware architecture